Design IPs

SmartDV develops Design Components, leveraging their rich experience in ASIC / SoC design and capabilities on Verilog and VHDL. Their Design components are configurable and, reusable plug-and-play design solutions for standard interfaces based on Verilog and VHDL. All their design components comes with advanced configuration and status reporting interface. All their Design components are validated using their Verification IPs which has been used to tapeout multiple ASIC by their customers. Also each of design IP is tested on FPGA platform. SmartDV uses lot of automation for writing Design IP, so time to develop any design IP is very efficient and faster. If you need any design IP which is not listed below, please do let us know. SmartDV can develop it very fast for you.

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