lager capacity

The single platform features 18.5 million system logic cells, with a verification capacity of up to 100 million equivalent logic gates, representing a twofold increase compared to the previous generation product. It supports multi-unit cascading for ultra-large-scale applications.

higer Performance

The 64-lane GTYP supports a data rate of 32 Gbps, while the 32-lane GTM achieves a maximum data rate of 56 Gbps. The platform also provides compatibility with PCIe 5.0, DDR5, 100GE and higher-speed optical fiber Ethernet, delivering a 2x performance improvement over the previous generation.

more scalable

The number of GIOs has doubled, with nearly 2,000 XPIOs distributed across the newly architected HSPI3 connectors, FMC+ standard connectors, and expandable high-speed interfaces. These are complemented by a rich set of daughter cards and corresponding interface solutions to meet diverse verification scenarios. The panel interfaces feature a modular design, supporting customized modular solutions for specialized application requirements.

increased automation

It supports fully automatic compilation, develops low-latency debug channels, enables automatic detection and configuration of daughter cards, and is equipped with dual power supplies. The system also provides multiple types of host computer interconnection interfaces, further enhancing the automated user experience.

Key Parameters

Product model	Capacity	FPGA RAM	DSP Slices	User IOs	Memory Support
VeriTiger®-PT100S	~100M ASIC Gate	858Mb	6864	1940	DDR4-SODIMM*2，LPDDR4/4X*1

功能标签

子卡是功能验证的重要辅助工具，能够有力增强验证扩展性。亚科鸿禹提供100多种即拿即用功能子卡资源，并提供经过众多开发项目充分验证的成熟解决方案。同时随着SoC/ASIC设计验证的需求不断多样化，更多类型的子卡需求不断涌现，亚科鸿禹专业研发团队可根据验证项目需求提供快速高效的子卡定制服务。