Time Class
The growth of the scale and complexity of advanced IC design has brought great challenges to verification. FPGA based testing which runs large-scale RTL designs(DUT) in hardware delivers exponentially higher speed compared to simulators, benefiting from data processing parallelly. More and more development teams choose to deploy FPGA based testing tools to accelerate the verification of large-scale designs.
HyperSemu-FPGA Based Testing：HyperSemu is an innovative high performance FPGA based testing for various types of FPGA design and system level algorithm design researched and developmented by HyperSilicon. HyperSemu delivers considerable testing capacity, Many intelligentized tools like hsSynth-the high-speed parallel compile solution, HyperProto-the partition tool, hsTrace-the DeepDebug tool and HyperSemu-the emulation software are ready to shorten the time of RTL to bitstream and achieve higher debug productivity.
http://hypersilicon.com
> 2022-11-27
In the process of emulation, the performance of acceleration changes according to interaction type of Testbench and DUT. There are 3 common types: cycle-based, transaction-based, and synthesizable.
FPGA prototyping using real sensors and output displayer to provide an intuitive and visual presentation of DUT execution results is the most suitable functional verification means for image processing designs.
Naneng Microelectronic High Speed Analog Design IP
SmartDV--DFI SYNTHESIZABLE Transactor
SmartDV--MISC MEMORY SYNTHESIZABLE Transactor
SmartDV--DIMM MEMORY SYNTHESIZABLE Transactor
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